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NY-Hopewell Junction, Job description 3D integration engineer working on current definition and optimization of wafer thinning, TSV reveal, RDL formation, bumping and assembly integration of 3D chip stacks. People in this role should have Back End of Line (BEOL), or Far Back End of Line (FBEOL), chip assembly, and chip to package integration experience. Initial and primary responsibilities include driving the integrati
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| Semiconductor Process Integration Engineering Prof | ||||